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| IN74LV244 OCTAL BUFFER/LINE DRIVER 3-STATE The IN74LV244 is a low-voltage Si-gate CMOS device and is pin and function compatible with IN74HC/HCT244. The IN74LV244 is an octal non-inverting buffer/line N SUFFIX driver with 3-state outputs. The 3-state outputs are controlled PLASTIC DIP by the output enable inputs 1OE and 2OE . A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The IN74LV244 is identical to the IN74LV240 but has non20 1 inverting outputs. DW SUFFIX * * * * * Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 1.2 to 3.6 V Low Input Current: 1.0 A, 0.1 at = 25 Output Current: 8 mA at VCC = 3.0 V High Noise Immunity Characteristic of CMOS Devices 20 1 SO ORDERING INFORMATION IN74LV244N Plastic DIP IN74LV244DW SOIC IZ74LV244 chip TA = -40 to 125 C for all packages LOGIC DIAGRAM 1A 0 1A 1 1A 2 1A 3 2 4 6 8 11 13 18 16 14 12 9 7 5 3 1Y 0 1Y 1 1Y2 1Y3 2Y0 2Y1 2Y 0 2Y 1 PIN ASSIGNMENT 1OE 1A0 2Y3 NONINVERTING OUTPUTS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 2OE 1Y0 2A3 1Y1 2A2 1Y2 2A1 1Y3 2A0 DATA INPUTS 1A1 2Y2 1A2 2Y1 1A3 2Y0 GND 2A 0 2A 1 2A 0 15 2A 1 17 OUTPUT ENABLES 1OE 2OE 1 19 PIN 20=VCC PIN 10 = GND FUNCTION TABLE OUTPUT Input nOE nAn nYn L L L L H H H X Z H= high level L = low level X = don't care Z = high impedance 1 IN74LV244 MAXIMUM RATINGS Symbol Parameter Value VCC DC supply voltage -0.5 to +5.0 IIK *1 DC Input diode current 20 IOK *2 DC Output diode current 50 IO *3 DC Output source or sink current 35 ICC DC VCC current 70 IGND DC GND current 70 PD Power dissipation per package: *4 750 Plastic DIP 500 SO Tstg Storage Temperature -65 to +150 260 TL Lead Temperature, 1.5 mm (Plastic DIP Package), 0.3 mm (SO Package) from Case for 4 Seconds * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. *1 VI < -0.5 V or VI > VCC + 0.5 V. *2 VO < -0.5 V or VO > VCC + 0.5 V. *3 -0.5 V < VO < VCC + 0.5 V. *4 Derating - Plastic DIP: - 12 mW/C from 70 to 125C SO Package: : - 8 mW/C from 70 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage VI Input Voltage VO Output Voltage TA Operating Temperature, All Package Types t r, tf Input Rise and Fall Time (Figure 1) VCC =1.2 V VCC =2.0 V VCC =3.0 V VCC =3.6 V * Unit V mA mA mA mA mA mW C C Min 1.2 0 0 -40 0 0 0 0 Max 3.6 VCC VCC +125 1000 700 500 400 Unit V V V C ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74LV244 DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit Test VCC Symbo Parameter conditions V 25C -40C to 125C l 85C min max min max min max 0.9 0.9 VIH HIGH level input 1.2 0.9 1.4 1.4 voltage 2.0 1.4 2.1 2.1 3.0 2.1 2.5 2.5 3.6 2.5 0.3 0.3 0.3 VIL LOW level input 1.2 0.6 0.6 0.6 voltage 2.0 0.9 0.9 0.9 3.0 1.1 1.1 1.1 3.6 1.0 1.0 VOH HIGH level VI = VIH or VIL 1.2 1.1 1.9 1.9 output voltage 2.0 1.92 IO = -50 2.9 2.9 3.0 2.92 3.5 3.5 3.6 3.52 VI = VIH or VIL 3.0 2.48 2.34 2.20 IO = -8 m 0.1 0.1 0.09 VOL LOW level VI = VIH or VIL 1.2 0.1 0.1 0.09 output voltage 2.0 IO = 50 0.1 0.1 0.09 3.0 0.1 0.1 0.09 3.6 VI = VIH or VIL 3.0 0.33 0.4 0.5 IO = 8 m II Input current VI = VCC or 0 V * 0.1 1.0 1.0 1.2 IOZ Three state 3-state 0.5 5 10 * leakage current outputs VI (01,19) = VIH VO =VCC or 0 V ICC Supply current VI =VCC or 0 V * 8.0 80 160 IO = 0 * VCC = 3.3 0.3 V Unit V V V V V V 3 IN74LV244 AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tr=tf=6.0 ns) Guaranteed Limit Test VCC Symbol Parameter conditions V 25C -40C to 125C 85C min ma min max min max x 150 125 - 100 tPHL, tPLH Propagation delay , VI = 0 V or 1.2 36 30 24 1An to 1Yn, 2An to VCC Figure 1 2.0 23 19 15 * 2Yn and 3 210 175 - 140 tPHZ tPLZ Propagation delay, VI = 0 V or 1.2 41 35 30 1OE to 1Yn, 2OE to VCC Figure 2 2.0 28 24 20 * and 4 2Yn 210 175 - 140 tPZH tPZL Propagation delay, VI = 0 V or 1.2 48 40 32 VCC Figure 2 2.0 1OE to 1Yn, 2OE to 30 25 20 * and 4 2Yn 90 75 60 tTHL, tTLH Output Transition VI = 0 V or 1.2 24 20 16 Time, Any Output VCC Figure 1 2.0 15 13 10 * and 3 CI Input capacitance 3.0 7.0 7.0 7.0 CPD Power dissipation VI = 0 V or 50 capacitance (per one VCC channel) * VCC = 3.3 0.3 V Unit ns ns ns ns pF pF tr 1An or 2An 10% 90% 50% tf VCC GND t PHL 1OE or 2OE t PZL 1Yn or 2Yn t PZH 50% VCC t PLZ 50% GND VCC tPLH 1Yn or 2Yn t TLH 50% 10% 90% t PHZ 50% VOL VOH GND t THL 1Yn or 2Yn Figure 1. Switching Waveforms Figure 2. Switching Waveforms TEST POINT DEVICE UNDER TEST TEST POINT 1k CL * OUTPUT CL * DEVICE UNDER TEST OUTPUT Connect to V CC when testing tPLZ and tPZL Connect to GND when testing tPHZ and tPZH * Includes all probe and jig capacitance Figure 3. Test Circuit * Includes all probe and jig capacitance Figure 4. Test Circuit 4 |
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